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| CVPD-940 Model 9X14 mm SMD, 3.3V, LVPECL Frequency Range: Temperature Range: (Option X) Storage: Input Voltage: Control Voltage: Settability At Nominal: Input Current: ree dF ea oHS nt L R plia m Co Differential LVPECL VCXO 50MHz to 250MHz 0C to 70C -40C to 85C -55C to 120C 3.3V 0.3V 1.65V 1.65V 1.65V 0.25V 88mA Max Output: Differential LVPECL Symmetry: 49/51% Typ, 45/55% Max Rise/Fall Time: 550ps Max @ 20% to 80% Vcc Pullability APR: 50ppm Min. Linearity: 10% Max Load: Terminated to Vdd-2V into 50 ohms Logic "1" Level: Vcc-0.96V Min, Vcc-0.81V Max Logic "0" Level: Vcc-1.85V Min, Vcc-1.65V Max Disable Time: 100ns Max Start-up time: 2ms Typ., 10ms Max Modulation BW: Sub-harmonics: Period Jitter: Phase Jitter: (20,000 periods) 12KHz~20MHz 50KHz~80MHz 100Hz 1KHz 10KHz 100KHz >10KHz @ -3dB none <5ps RMS (1-sigma) Max <1ps RMS (1-sigma) Max, <1ps RMS (1-sigma) Max, -80 dBc/Hz -108 dBc/Hz -132 dBc/Hz -140 dBc/Hz <3ppm 1st/yr, <2ppm every year thereafter Phase Noise Max: Aging: Applications: 10 Gigabit Ethernet OC48: Forward Error Correction Broadband Networks SONET/SDH/DWD ATM Network/switch Telecom Designed using FR5 PCB & HFF crystal technology to provide a Low Noise, Low Jitter Voltage Controlled Crystal Oscillator solution at a competitive price. Specifications subject to change without notice. TD-030705 Rev. C Page 1 of 2 CVPD-940 Model 9X14 mm SMD, 3.3V, LVPECL Crystek Part Number Guide CVPD-940 X-155.520 #1 #2 #3 #4 ree dF ea oHS nt L R plia m Co 0.560 (14.2) Differential LVPECL VCXO Bottom View 0.360 (9.14) #1 Crystek SMD PECL VCXO #2 Model 940 = 9x14 High Frequency 3.3V #3 Temp. Range: Blank = 0/70C, X=-40/85C #4 Frequency in MHz: 3 or 6 decimal places CRYSTEK P/N Frequency Date Code 0.560 (14.2) 1 6 0.100 (2.54) 2 5 3 4 0.040 (1.01) 0.070 (1.77) Example: CVPD-940X-155.520 = 3.3V, -40/85C, 155.520 MHz 0.210 (5.3) SUGGESTED PAD LAYOUT 0.050 (1.27) Standard Frequencies MHz 74.1758 161.1328 74.250 166.6286 77.7600 167.3317 155.5200 212.5000 156.2500 250.0000 RECOMMENDED REFLOW SOLDERING PROFILE TEMPERATURE 260C 217C 200C 150C Ramp-Up 3C/Sec Max. Critical Temperature Zone Ramp-Down 6C/Sec. Pad 1 2 3 4 5 6 Connection Volt Cont. E/D GND OUT COUT Vdd 0.090 (2.28) 0.280 (7.11) 0.200 (5.08) Enable/Disable Function Pin 2 Preheat 180 Secs. Max. 8 Minutes Max. 90 Secs. Max. Output Pin 260C for 10 Secs. Max. NOTE: Reflow Profile with 240C peak also acceptable. Open Active "0" level Vcc-1.620V Max Active "1" level Vcc-1.025V Min Disabled Disabled State: Pin 4 will assume a fixed level of logic "0" Pin 5 will assume a fixed level of logic "1" Mechanical: Shock: Solderability: Vibration: Solvent Resistance: Resistance to Soldering Heat: Environmental: Thermal Shock: Moisture Resistance: Packaging: Tape/Reel: MIL-STD-883, Method 2002, Condition B MIL-STD-883, Method 2003 MIL-STD-883, Method 2007, Condition A MIL-STD-202, Method 215 MIL-STD-202, Method 210, Condition I or J MIL-STD-883, Method 1011, Condition A MIL-STD-883, Method 1004 100ea, 250ea,500ea 24mm Tape Specifications subject to change without notice. TD-030705 Rev. C Page 2 of 2 |
Price & Availability of CVPD-940X-155520
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